10 lines
201 B
Verilog
10 lines
201 B
Verilog
module TC_Not(in, out);
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parameter UUID = 0;
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parameter NAME = "";
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parameter BIT_WIDTH = 1;
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input [BIT_WIDTH-1:0] in;
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output [BIT_WIDTH-1:0] out;
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assign out = ~in;
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endmodule
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