cdecl16 for EnableA20 ver.1

This commit is contained in:
2024-10-03 15:10:22 -04:00
parent a3af2a5825
commit 9080533175

View File

@@ -78,8 +78,6 @@ main:
call PrintString call PrintString
add sp, 0x2 add sp, 0x2
ERROR STEVIA_DEBUG_HALT
; enable A20 gate ; enable A20 gate
call EnableA20 call EnableA20
@@ -88,6 +86,8 @@ main:
call PrintString call PrintString
add sp, 0x2 add sp, 0x2
ERROR STEVIA_DEBUG_HALT
; get system memory map ; get system memory map
call GetMemoryMap call GetMemoryMap
@@ -881,17 +881,12 @@ disable_cursor:
; ;
; TODO: fix the prolog, epilog and stack usage to confirm with cdecl16 ; TODO: fix the prolog, epilog and stack usage to confirm with cdecl16
EnableA20: EnableA20:
push bx __CDECL16_ENTRY
push cx
; end prolog
; checked this way since this will /always/ work
.a20_check:
pushf
push ds push ds
push es push es
push di pushf ; save data and extra segment since we touch them and save flags
push si .a20_check:
cli cli
xor ax, ax xor ax, ax
@@ -924,13 +919,7 @@ EnableA20:
je EnableA20.end_check je EnableA20.end_check
mov ax, 1 ; return 1 if es:di != ds:si (A20 is enabled) mov ax, 1 ; return 1 if es:di != ds:si (A20 is enabled)
.end_check: .end_check:
pop si
pop di
pop es
pop ds
popf
sti sti
cmp ax, 1 cmp ax, 1
je EnableA20.endp ; A20 is already enabled je EnableA20.endp ; A20 is already enabled
@@ -960,9 +949,10 @@ EnableA20:
out 0x92, al ; enable A20 out 0x92, al ; enable A20
jmp EnableA20.a20_check jmp EnableA20.a20_check
.endp: .endp:
pop cx popf
pop bx pop es
pop ds
__CDECL16_EXIT
ret ret
; TODO: fix the prolog, epilog and stack usage to confirm with cdecl16 ; TODO: fix the prolog, epilog and stack usage to confirm with cdecl16