From eb97aac6734ce63b673b5351353d9859dc37fd94 Mon Sep 17 00:00:00 2001 From: Elaina Claus Date: Sat, 12 Oct 2024 22:14:47 -0400 Subject: [PATCH] relocate code sections to end up with stage2 starting at 0x500 --- include/entry.inc | 4 ++-- src/mbr/mbr.nasm | 27 ++++++++++++++------------- src/stage2/stage2.nasm | 29 +++++++++++++++++++---------- src/vbr/vbr.nasm | 18 +++++++----------- 4 files changed, 42 insertions(+), 36 deletions(-) diff --git a/include/entry.inc b/include/entry.inc index b21aa8d..0d276ee 100755 --- a/include/entry.inc +++ b/include/entry.inc @@ -21,10 +21,10 @@ %ifndef __INC_ENTRY ; 8KiB from 0x2500 -> 0x500 -%define EARLY_STACK_START 0x2500 +%define EARLY_STACK_START 0xFFFF %define MBR_ENTRY 0x0600 %define VBR_ENTRY 0x7C00 -%define STAGE2_ENTRY 0x7E00 +%define STAGE2_ENTRY 0x0500 %endif %define __INC_ENTRY \ No newline at end of file diff --git a/src/mbr/mbr.nasm b/src/mbr/mbr.nasm index 9cbd24c..a382ba6 100755 --- a/src/mbr/mbr.nasm +++ b/src/mbr/mbr.nasm @@ -42,16 +42,18 @@ nop ALIGN 4 init: - cli ; We do not want to be interrupted + cli ; We do not want to be interrupted - xor ax, ax ; 0 AX - mov ds, ax ; Set segment registers to 0 - - mov ss, ax ; Set Stack Segment to 0 - mov sp, EARLY_STACK_START ; Setup stack - mov bp, sp ; base ptr = stack ptr - sub sp, 0x20 ; local varible space + xor ax, ax ; 0 AX + mov ds, ax ; Set segment registers to 0 + mov es, ax + + mov ss, ax ; Set Stack Segment to 0 + mov sp, EARLY_STACK_START ; Setup stack + mov bp, sp ; base ptr = stack ptr + sub sp, 0x10 ; local varible space + xor cx, cx mov ch, 0x01 ; 256 WORDs in MBR (512 bytes), 0x0100 in cx mov si, 0x7C00 ; Current MBR Address (loaded here by BIOS) mov di, MBR_ENTRY ; New MBR Address (our new relocation address) @@ -115,12 +117,11 @@ main: mov dword eax, dword [bx + PartEntry_t.lba_start] push dword eax ; lba - xor ax, ax - push ax ; offset = 0 - mov ax, VBR_ENTRY - shr ax, 4 - push ax ; segment = 7C0 + push ax ; offset = 0x7c00 + + xor ax, ax + push ax ; segment = 0 ; uint8_t read_stage2_raw(uint16_t buf_segment, uint16_t buf_offset, ; uint32_t lba, diff --git a/src/stage2/stage2.nasm b/src/stage2/stage2.nasm index 78b4980..08536e4 100755 --- a/src/stage2/stage2.nasm +++ b/src/stage2/stage2.nasm @@ -19,7 +19,7 @@ ; SOFTWARE. [BITS 16] -[ORG 0x7E00] +[ORG 0x0500] ; IF YOU CHANGE ORG CHANGE THE SIGN OFFSET AT THE END [CPU KATMAI] [map all stage2.map] [WARNING -reloc-abs-byte] @@ -47,7 +47,7 @@ %endmacro section .text -org 0x7E00 +org 0x0500 begin_text: jmp short (init - $$) @@ -57,6 +57,18 @@ ALIGN 4, db 0x90 init: cli ; We do not want to be interrupted + mov cx, (end_bss - begin_bss) ; count = bss length + + mov ax, begin_bss + shr ax, 4 + mov es, ax ; es = begining of bss section + + xor ax, ax + mov di, ax ; dst = 0 + + cld + rep stosb ; zero bss section + mov ax, __STAGE2_SEGMENT ; configured segment mov ds, ax ; Set segment registers to 0 mov es, ax ; * @@ -128,11 +140,8 @@ main: mov eax, dword [STAGE2_SIG] cmp eax, 0xDEADBEEF - je main.bss_init + je main.stage2_main ERROR STAGE2_SIGNATURE_MISSING - -.bss_init: - nop ; placeholder .stage2_main: call SetTextMode call disable_cursor @@ -396,8 +405,9 @@ unreal_gdt_start: dw 0xFFFF ; Segment Limit 15:0 dw 0x0000 ; Base Address 15:0 db 0000_0000b ; Base Address 23:16 + db 1001_1010b ; Access Byte: executable, readable, present - db 0000_1111b ; Flags: 16-bit, Granularity = 4KiB + db 1000_1111b ; 24:20 G/DB/L/AVL & SegLimit 19:16 db 0000_0000b ; Base Address 31:24 ; entry 2 (16-bit data segment with 4 GiB flat mapping) @@ -405,7 +415,7 @@ unreal_gdt_start: dw 0x0000 ; Base Address 15:0 db 0000_0000b ; Base Address 23:16 db 1001_0010b ; Access Byte: readable, writable, present - db 0000_1111b ; Flags: 16-bit, Granularity = 4KiB + db 1000_1111b ; Flags: 16-bit, Granularity = 4KiB db 0000_0000b ; Base Address 31:24 unreal_gdt_end: @@ -459,7 +469,7 @@ end_data: ; section start location needs to be a 'critical expression' ; i.e resolvable at build time, we are setting 0x7E00 as the offset since -section .sign start=((MAX_STAGE2_BYTES - 512) + 0x7E00) +section .sign start=((MAX_STAGE2_BYTES - 512) + 0x0500) times ((512 - 4) - ($ -$$) ) db 0x90 ; nop STAGE2_SIG: dd 0xDEADBEEF ; Signature to mark the end of the stage2 @@ -474,7 +484,6 @@ stage2_main_redzone resb 32 SteviaInfo resd 4 fat32_state resb FAT32_State_t_size -align 512 disk_buffer resb 512 fat_buffer resb 512 diff --git a/src/vbr/vbr.nasm b/src/vbr/vbr.nasm index 3bc198b..50e312f 100755 --- a/src/vbr/vbr.nasm +++ b/src/vbr/vbr.nasm @@ -115,13 +115,12 @@ main: mov dword eax, 0x1 push dword eax ; lba - xor ax, ax - push ax ; offset = 0 - ; 07E0:0 = 0x00007e00 mov ax, STAGE2_ENTRY - shr ax, 4 - push ax ; segment = 7E0 + push ax ; offset + + xor ax, ax + push ax ; segment = 0 ; uint8_t read_stage2_raw(uint16_t buf_segment, uint16_t buf_offset, ; uint32_t lba, @@ -130,11 +129,8 @@ main: add sp, 0xC .check_sig: - ; BUG: this is hard coded to check @ ((0x7E0 << 4) + 0x7FFC)...i.e (STAGE2_ENTRY + (STAGE2_MAX_BYTES - 4)) - ; this should be removed or done properly - mov ax, 0x7E0 - mov fs, ax - cmp dword [fs:0x7FFC], 0xDEADBEEF + mov eax, dword [(MAX_STAGE2_BYTES - 4) + 0x500] + cmp eax, 0xDEADBEEF je main.sig_ok ERROR VBR_ERROR_NO_SIGNATURE ; no signature present in stage2 @@ -142,7 +138,7 @@ main: .sig_ok: mov si, word [bp - 4] mov dl, byte [bp - 2] - jmp word 0x0000:0x7E00 + jmp word 0x0000:STAGE2_ENTRY ; ############### ; Required BIOS function(s)